ASIC Design Engineer, OpenTitan

Job Description

A person with disabilities will be given preferential consideration per local regulations.

Qualifications

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
• Experience with all aspects of the ASIC life cycle.
• Experience with hardware description languages (RTL) such as Verilog and System Verilog.

Preferred qualifications:

• Experience with Open Source projects.
• Experience with synthesis, power analysis, and timing closure.
• Solid team player with excellent communication skills.

About the job

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

OpenTitan’s mission is security through transparency. We are changing the paradigm of silicon development by embracing open source methods to create a new class of security products. With our internal and external partners, we are producing the first commercially impactful open silicon root of trust ASIC based on an open source project. The team is not limited to silicon design, it encompasses every aspect of secure embedded hardware development.

Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.

Responsibilities

• Understand the overall application of the ASIC, and architect, micro-architect, document, and design disparate IPs, while applying engineering best practices.
• Implement designs in SystemVerilog, and participate in verification, synthesis, timing/power closure and emulation/silicon bring-up.
• Contribute to use-case performance and power analysis and make suggestions to improve the design PPA.
• Work closely with Firmware and Software teams on functionality, interfaces, and documentation.

Location

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form .

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