ASIC Interface/Storage Architect

Job Description

Note: By applying to this position you will have an opportunity to share your preferred working location for this position from the following: Mountain View, CA, USA; San Diego, CA, USA

Qualifications

Minimum qualifications:

• Bachelor's degree in Computer Science, Electrical Engineering, or equivalent practical experience.
• 5 years of experience.
• Experience with one or more high speed serial interface protocol.

Preferred qualifications:

• Master's degree in Computer Science or Electrical Engineering.
• 8 years of experience.
• Experience in I/O interface architecture and micro-architecture.
• Experience with evaluating, selecting, and configuring third party interface IPs.
• Experience with some of the following interfaces: DisplayPort 1.4, 2.0; HDMI; CSI-2 2.x, 3.y; DSI-2 1.x; SPMI; I3C 1.x / I2C; SPI; UARTs; TDM / I2S / Soundwire; PDMs.
• Knowledge of one or more of the following interfaces: PCIe gen3, 4; USB 2, 3.x; UFS 3.x; SD; NVMe

About the job

As an ASIC Interface Architect, you'll be responsible for the architectural definition/configuration of the I/O and storage subsystems of ASIC products. You'll collaborate with Software and Hardware Architects to build a compelling, rich set of interfaces, and justify your decisions with the performance of relevant workloads and use-cases. Utilizing your standards-specific knowledge, you will support the configuration and integration of IPs into the overall design, including working with the power, clock, fabric, security, system, and all other related architects.

Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.

Responsibilities

• Define the I/O interface architecture of future ASICs. Author the architecture and micro-architecture specifications.
• Collaborate with company-wide stakeholders like Product Management, System Architecture, and Software Engineering to develop I/O interface roll-up and features.
• Understand device usage scenarios and help drive tradeoffs. Perform performance, power, area (PPA) evaluation of prospective IPs and sub-systems.
• Work closely with design, verification, physical design, and silicon validation teams to ensure the implementation follows the architectural and micro-architectural intent.
• Monitor and contribute to relevant standards bodies. Monitor relevant industry and academic trends.

Locations

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